Si5351 VFO sketches

Back when Etherkit did come out with its Si5351 boards, I wrote some sketches to use these as VFO’s.  These sketches have been floating around the internet, without being collected at a single place, so thats going to change, in hope that it will reduce the repeating e-mails a bit.

Both sketches work as a basic VFO. It starts at a given frequency, and there is not implemented a method of changing bands. This can be easily added by someone with a little programming experience.  All of these sketches requires NT7S Si5351 library. Please support his development by buying a board.

The encoder used is a regular quadrature encoder (not Graycode, altough using a stepper motor as a graycode encoder should be investigated). There needs to be a couple debouncing capacitors (100nF) over each of the leads from encoder to ground. This should go as close to the encoder as possible. In addition, you may want to add a 22Ω resistor in series with the A and B leads, and another 100nF at the microcontroller side.

There is a RX/TX pin. Put this pin LOW for RX or the VFO will not tune. This is a tune inhibit function, and can be used for locking the tuning while TX.

The sketches are made to work on both AtMega328 and AtMega32U4 boards. There is some preprosessor switches to decide between those 2. If you use a different board, you may need to use a different set of interrupt pins, and some other preprosessor switches.

All of these sketches are provided free of charge, as is, for use by experimenters in non-comercial ways. There is no warranty nor support, altough I may answer some questions…

There exists 2 kinds of versions of the sketch depending on what display you want to use:

16×2 LCD  Display

This is the most common one.



OLED display

There is some nice, small OLEDS around for $3 or so that can be used with a graphics library called U8glib:


This version supports both Arduino Uno with ATMega 328, and Arduino Leonardo with ATMega 32U4.

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Homemade thermal test chamber

Some time back (2016 timeframe) I built a test chamber out of an inexpensive freezer, after having several project that required taking some thermal data over the expected useable range.  I was looking for a used laboratory freezer that goes down to -60° or lower, but none seems available used.


The freezer uses “pentane C” cooling media,  and the initial test suggested that before modification, the freezer, with the pump running all the time would go down to -26°C.

After confirming that the freezer would work, it was time to void the warranty. What better way, than by drilling a hole through the side of the freezer?


I choose to drill through the plastic with a small pilot drill, then poke around to see if there was any cooling tubes in the side. That way I hopefully I would be able to avoid cutting any of the tubes.  Given that I couldn’t feel anything in the foam insulation, it was time for the hole saw.  With a hole through the side of the bottom compartment, a 36mm plastic tube was fitted, some foam spray was used to fix the defects and some clear silicone sealed the gap between the tube and the side of the freezer.

The idea I started with was to make a proper, insulated patch panel, with both coax and DC connectors, but after some thinking, the tube filled with a rag seemed like a more flexible approach.


Ripping out the thermostat and sensor tube was quite easy, threading the sensor cable for a ready-made 1-wire sensor (got this via some time back). Drilling a hole in the wall of the  small compartment was done by poking through the insulation from the back with a pice of wire, then when confirming it was clear off the cooling tubes and drilling through.

A 12V PTC heater with fan was modified so that the fan can run all the time, and fitted to the shelf. This way there will be constant air circulation inside, and the heater can be controlled by the microcontroller.

On the back of the freezer,  the connector block for the freezer had an unused terminal that was repurposed as a terminal for the live wire that before had gone to the thermostat. A 12V 20A switch mode power supply was added, and fixed to the back wall with a couple M3 screws and nuts.


A Arduino was fixed above the power supply, and a small pice of wearoboard with some relays and driver transistors to switch the power to the pump motor and to the heater.

The program running on the microcontroller is a fuzzy logic implementation with a 2°C hysteris. There is also some timing logic to not turn on the pump before the back pressure has bled trough, or the fuse will blow.  I started out with some SCR’s but the cheap eBay SCR I bought had too much loss before it caught fire.

The program can be found here:

I intend to implement a proper dual PID for the controller one day, as keeping temperatures within 0.5°C should not be too difficult. Adding network interface in addition to the USB and a propper way of handling those messages would make it more versatile.

There is currently no cap on how hot it can become inside, but I suspect the plastic casing will not take well to having it run at high temperature for long time.

The inside usable size is approx 320x320x180mm, so there is no way of fitting a 19″ rack in there, but for smaller parts, it will do OK.  Now I just need to build the multiple termocouple amplifiers into a box with some method of reading it out.

An example of measured data:



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Si5351B FM modulation

The Si5351B have an interesting feature in that it can be FM modulated via the VCXO pin. After some discussions with Jason NT7S about the VCXO feature in his last revisions of the Si5351 library we decided I had to try that.

The VCXO pin is DC coupled and swings the crystal frequency a programmed amount to either side of the center frequency. As such, the input should be biased to a given point (VCC/2) and the input AC coupled.


Points to the first one that can tell what side the sine of the modulation signal are clipping  in the above plot (I should get around to fixing that signal generator).

By modulating with 1KHz and 40PPM pull range, I obtained a deviation of 2.5KHz with 2Vp-p  modulating signal. 5KHz was obtained with 4.3Vp-p. It is quite important to avoid overdriving the input, there will be excessive distortion if the input amplitude is larger than 3Vp-p. In order to obtain 5KHz deviation, a 60PPM pull range should put the needed modulation at less than 3Vp-p.

In addition, the input signal should be filtered, limited and added pre-emphasis.

(This article was written in january 2017, but newer published for some reason.)



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Si5351 Spurius preformance

As some of you know, I have done a lot of work with the Si5351 series of synthesizers. In a couple of blog post, I will try to document some of the more subtile details of operation of this chip. Since I don’t have access to the actual mask sets for the chips some of these statements are qualified guessing, based on observations by NT7S and myself.

I believe the routing in the chip to be more complicated than outlined in the datasheet. Trying to determine where the spurious responses come from, and why they have their amplitudes have shown some of the internals that I will try to outline. Lets start with the block diagram, shamelessly stolen from SiLabs:


The Synthesizer consists of a crystal oscillator (or TCXO/OCXO) with drivers. The performance of this is depending on the signal quality. A good designed crystal oscillator with a limiter will outperform the internal oscillator on phase noise.  Notice that the C version has a switching matrix after the oscillator and the option to feed in an external clock. This is a nice option for those cheap OCXO’s that are on non-integer frequencies.

A bit interesting is it that the datasheet mentions 25MHz and 27MHz as the alternative frequencies, but the chip works on a broad range. That 26MHz crystal will work just fine. I do believe the input frequency are divided down to  5MHz, before being distributed internally. This would then be routed out to PLL A and B, microcontroller (for the I2C) and probably to the multisynth stages as a clock.

There are both internal and external capacitors to the device. A interesting point is that when using regular crystals the spurious products seems to be reduced when selecting the internal capacitors, unlike loading with external capacitors.


The above picture is taken with PLL A set to 870MHz and the multisynth set to 6. There is up to 10dB difference between the 0pF (blue plot) and 10pF (red plot), using the internal capacitors. Selecting the 0pF internal capacitor, and using external 18pF, lead to a 10dB increase in spurs above what can be seen above. I should point out that while there are some spurs, they are not a deal breaker in this case, the above spurs can easily be removed by bandpass filtering if necessary.

The PLL’s seems to be a fairly common design, with a PLL bandwidth of around 200KHz (there are some subtile spurs). The PLL operates over the range 600MHz-900MHz. This part is the well-behaved part of the chip.

The “Multisynth” is the unknown part of the chip. I believe this is some kind of fractional divider,  clocked by the PLL signal and the 5MHz internal clock. The output spurs are reduced when the divider is operated at integer divisions instead of fractional divisions. Some experiments suggest that the multisynth is followed by a divide-by-2, as the output always have a 50% duty cycle square wave.

The way to get the best performance is to lock the Multisynth at a suitable integer level, and move the PLL to do the frequency change.  The output should be used with a switching type mixer (DBM with diodes in saturation or switches) in order to get the best preformance. A good limiter could reduce the spurious responses, perhaps reducing the voltage to the output buffer would help in driving them deeper into saturation, and giving better limiting action?

ADDITION 31. dec 16: The above plot is the worst case I have been able to make by abusing the Si5351. This is not at all typical performance. The 200KHz spurs is usually found at an amplitude less than -110dBc, and other spurious products should be below -70dBc. In my opinion, the chip is well suited as local oscillator in a receiver. 

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Mitsubishi MOSFET VHF hybrids

The last 15 years there have been a large development in MOS hybrid preformance, combined with a reduction in price, making these hybrid amplifiers quite a reasonable choice for a power amplifier in a VHF or UHF transceiver.

This hybrid is the Mitsubishi RA07H0608M made for the 60-88MHz range. I have been using these for experiments in the 70MHz band with both linear modes and FM. This hybrid should work on 50MHz, but determining the optimal bias point for linear would require the ability to do 2-tone testing.

I managed to burn out one of the amplifier modules due to self oscilations, and wanted to do some reverse engineering of what’s in the hybrid.

This hybrid is  a thick film hybrid with 2 MOSFET dies, one for the PA and one for the driver in addition to biasing and impedance maching components. The white goop is probably non-acidic sillicone used to attach the plastic casing to the substrate and cooling tab.



The driver amplifier is a vertical MOS die, approximately 1mm x 2mm in size and with 2 bond wires to the base, and 3 to the drain.


The PA transistor is a fairly large vertical MOS device, with 2 clearly visible trenches and several bonding wires on the drain. This is to reduce the inductance in the bonding wire and carry enough current. The die is quite large, approx 3mm x 3mm in size. There are some interconnections on the top of the die, but due to the passivation and sillicone around the die, its difficult to see the connections clearly.


A interesting thing is how one pass wires over antother. The hybrid consists of  a ceramic base (called substrate), with a groundplane on the backside that are bonded to the cooling tab. Traces is then put on the top of the ceramic substrate and fused together by firing. In order to make a wire pass over another, the  bottom wire is laid down and fired (heated in a furnace to a given temperature), then a isolating layer is laid down and fired before the other trace is laid down and fired. This is done because there is only one layer avaible to put traces on, and having extra wire connections to the hybrid is expensive. The opague isolator as shown are probably BeO, although the datasheet don’t mention that there is BeO in the device. BeO dust is toxic.

The traces shown here is  the bias line to the PA FET passing over the drain supply to the driver FET.


Another interesting thing about this hybrids are the extensive use of 0402 and 0603 resistors and capacitors. With thick film hybrids, its quite possible to put the resistors directly on the substrate. A reason to not do that in a amplifier like this may be that the resistors will have a termal gradient and that the resistors would require expensive laser trimming.  High value capacitors like those used for decoupling are hard to make on a hybrid like this, so soldering in regular SMD components, and even electrolytics some times.

The PA FET has negative feedback to reduce gain and improve stability, while I could not see any for the driver. There seems to be some damage to my module there, could I have blown that off the hybrid? The increase in drive level by adding some light feedback to the driver may be worth a experiment.

The output and input matching looks to be of the lowpass kind, and on the output there are some harmonic supression. The RF design here clearly outperforms the mechanical and cooling. Interfacing these modules into circuits that once held older bipolar hybrids may not be straigth forward. There is a lot of gain to several GHz avaible in the FET’s and the grounding needs to be good to avoid oscillations.

Overall, the reverse engineering of these modules were quite interesting.  A interesting thing to do may be to trace out the shcematic, although it should look like most any of the other modules available. Curve tracing the FET could be interesting to determine their parameters.

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A notch filter for phase noise measurment

Measuring phase noise is difficult, due to the large difference between the signal and the noise.  Here I will outline the method I use to determine the noise of a oscillator and show the basic bandpass – notch filter used to reduce the carrier level to a level that the common spectrum analyzer can handle.   The filter shown here will be made for 9MHz, but other frequencies can be realized as long as high Q matched crystals can be found.

When doing these measurements, reducing the noise figure of the spectrum analyzer, and knowing the inserted gain is important. I use a module with a ERA-2 MMIC mounted in a die cast box with extended filtering on the DC input.

The filter module start with a QTC (Quad Tuned Circuit) mixed form bandpass filter.  This is built and tuned for a flat bandpass before the notch


After the filter is built and tuned the crystals are connected over the 2 resonators in center and the filter is adjusted to have a as flat as possible passband. This way, with crystals matched as close as possible (2Hz) the notch depth should be better than 80dB. If the crystals can’t be matched, then a trim capacitor can be placed in series with the crystal, but this makes the tuning of the notch depth much more difficult.


The obtained filter does not need to have the notch in the center of the passband. the 3dB points of the filter will be what limits the bandwith of your measurement. If the crystals have high Q and no spurious responces (mine had some) then the passband should be flat. If there is some spurious responces, you can average it out on most spectrum analyzers. Knowing the width of the notch at the 3dB point determines how close to the carrier you can measure the phase noise.


To use the filter with a spectrum analyzer, you add a low noise amplifier with known gain at the frequency you operate on between the filter and the spectrum analyzer. Add a variable attenuator in front of the filter and set this to max attenuation before connecting it to the signal source.

Tune the signal source to the frequency where it is attenuated the most by the filter and reduce the attenuation to 0. If The noise level around the notch should be somewhat higher than the attenuated carrier.

If the spectrum analyzer have a marker that can show the amplitude level in dBm/Hz then the level of the phase noise in dBc is: Source output power(dBm) + noise amplitude (dBm) + (loss through filter in dB) – (amplifier gain in dB). For example, lets assume my source is at 10dBm, the measured noise level at -115dBm,  2.4dB filter loss and 20dB gain:  10dBm + (-115dBm/hz) + (-2.4dB) –  (20dB) = -127dBc/Hz phase noise.

If the analyzer does not have a marker function then you need to know the bandwith of the IF filter in the analyzer in addition to the parameters above.  The total equation would then be: Source output power(dBm) + noise amplitude (dBm) + (loss through filter) – (amplifier gain) – 20*log(analyzer bandwith in Hz ).   For example, source at 10dBm, measured noise level at -105dBbm in 100Hz bandwith, 2.4dB filter loss and 20dB gain: 10dBm + (-95dBm) +(-2.4dB) – (20dB) -(20*log(100)) = -147dB/Hz phase noise.


Accurate noise measurements are not easy to do. Careful evaluation of all used components and careful measurements with averaging of the traces helps to obtain accurate measurements. Alternative methods use phasing or PLL methods, and have better accuracy over a larger bandwidth, at the expence of a more advanced measurement setup.

Update February 2015:

Did a measurement of the HP8656B signal generator using the notch filter and a ERA-2 amplifier with 15.7dB gain:



The input signal into the notch filter were 0dBm and the notch filter loss 2.4dB. The total equation will then be: 0 +(-106.1dBm/Hz) + (-2.4dB) -15.7dB = -124.2dBc/Hz at the point 10KHz offset from the carrier.  This value corresponds well with other methods used to measure the phase noise on this generator. The value is 10dB better than the than what the datasheet states as worst case phase noise, not uncommon for HP equipment from the 1980s era.

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SMD prototyping

I was asked about the method I use for making small PCB’s with SMD components.

Here is a video showing the process:

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